FM / asm

/usr/include/asm

Name	Size	Mode	Actions
a.out.h	693	0644	edit dl rm
auxvec.h	281	0644	edit dl rm
bitsperlong.h	229	0644	edit dl rm
boot.h	260	0644	edit dl rm
bootparam.h	2970	0644	edit dl rm
byteorder.h	137	0644	edit dl rm
debugreg.h	2904	0644	edit dl rm
e820.h	2259	0644	edit dl rm
errno.h	31	0644	edit dl rm
fcntl.h	31	0644	edit dl rm
hyperv.h	8103	0644	edit dl rm
ioctl.h	31	0644	edit dl rm
ioctls.h	32	0644	edit dl rm
ipcbuf.h	32	0644	edit dl rm
ist.h	790	0644	edit dl rm
kvm.h	6212	0644	edit dl rm
kvm_para.h	2305	0644	edit dl rm
ldt.h	1243	0644	edit dl rm
mce.h	5241	0644	edit dl rm
mman.h	170	0644	edit dl rm
msgbuf.h	32	0644	edit dl rm
msr-index.h	23412	0644	edit dl rm
msr.h	311	0644	edit dl rm
mtrr.h	3788	0644	edit dl rm
param.h	31	0644	edit dl rm
poll.h	30	0644	edit dl rm
posix_types.h	92	0644	edit dl rm
posix_types_32.h	1316	0644	edit dl rm
posix_types_64.h	1306	0644	edit dl rm
prctl.h	190	0644	edit dl rm
processor-flags.h	3656	0644	edit dl rm
ptrace-abi.h	1797	0644	edit dl rm
ptrace.h	1192	0644	edit dl rm
resource.h	34	0644	edit dl rm
sembuf.h	699	0644	edit dl rm
setup.h	82	0644	edit dl rm
shmbuf.h	32	0644	edit dl rm
sigcontext.h	5403	0644	edit dl rm
sigcontext32.h	1684	0644	edit dl rm
siginfo.h	198	0644	edit dl rm
signal.h	2958	0644	edit dl rm
socket.h	32	0644	edit dl rm
sockios.h	33	0644	edit dl rm
stat.h	2324	0644	edit dl rm
statfs.h	353	0644	edit dl rm
swab.h	1179	0644	edit dl rm
termbits.h	34	0644	edit dl rm
termios.h	33	0644	edit dl rm
types.h	114	0644	edit dl rm
ucontext.h	339	0644	edit dl rm
unistd.h	82	0644	edit dl rm
unistd_32.h	10692	0644	edit dl rm
unistd_64.h	24238	0644	edit dl rm
vm86.h	3055	0644	edit dl rm
vsyscall.h	375	0644	edit dl rm

Edit: /usr/include/asm/debugreg.h (2904B)

#ifndef _ASM_X86_DEBUGREG_H
#define _ASM_X86_DEBUGREG_H

/* Indicate the register numbers for a number of the specific
   debug registers.  Registers 0-3 contain the addresses we wish to trap on */
#define DR_FIRSTADDR 0        /* u_debugreg[DR_FIRSTADDR] */
#define DR_LASTADDR 3         /* u_debugreg[DR_LASTADDR]  */

#define DR_STATUS 6           /* u_debugreg[DR_STATUS]     */
#define DR_CONTROL 7          /* u_debugreg[DR_CONTROL] */

/* Define a few things for the status register.  We can use this to determine
   which debugging register was responsible for the trap.  The other bits
   are either reserved or not of interest to us. */

#define DR_TRAP0	(0x1)		/* db0 */
#define DR_TRAP1	(0x2)		/* db1 */
#define DR_TRAP2	(0x4)		/* db2 */
#define DR_TRAP3	(0x8)		/* db3 */

#define DR_STEP		(0x4000)	/* single-step */
#define DR_SWITCH	(0x8000)	/* task switch */

/* Now define a bunch of things for manipulating the control register.
   The top two bytes of the control register consist of 4 fields of 4
   bits - each field corresponds to one of the four debug registers,
   and indicates what types of access we trap on, and how large the data
   field is that we are looking at */

#define DR_CONTROL_SHIFT 16 /* Skip this many bits in ctl register */
#define DR_CONTROL_SIZE 4   /* 4 control bits per register */

#define DR_RW_EXECUTE (0x0)   /* Settings for the access types to trap on */
#define DR_RW_WRITE (0x1)
#define DR_RW_READ (0x3)

#define DR_LEN_1 (0x0) /* Settings for data length to trap on */
#define DR_LEN_2 (0x4)
#define DR_LEN_4 (0xC)
#define DR_LEN_8 (0x8)

/* The low byte to the control register determine which registers are
   enabled.  There are 4 fields of two bits.  One bit is "local", meaning
   that the processor will reset the bit after a task switch and the other
   is global meaning that we have to explicitly reset the bit.  With linux,
   you can use either one, since we explicitly zero the register when we enter
   kernel mode. */

#define DR_LOCAL_ENABLE_SHIFT 0    /* Extra shift to the local enable bit */
#define DR_GLOBAL_ENABLE_SHIFT 1   /* Extra shift to the global enable bit */
#define DR_ENABLE_SIZE 2           /* 2 enable bits per register */

#define DR_LOCAL_ENABLE_MASK (0x55)  /* Set  local bits for all 4 regs */
#define DR_GLOBAL_ENABLE_MASK (0xAA) /* Set global bits for all 4 regs */

/* The second byte to the control register has a few special things.
   We can slow the instruction pipeline for instructions coming via the
   gdt or the ldt if we want to.  I am not sure why this is an advantage */

#ifdef __i386__
#define DR_CONTROL_RESERVED (0xFC00) /* Reserved by Intel */
#else
#define DR_CONTROL_RESERVED (0xFFFFFFFF0000FC00UL) /* Reserved */
#endif

#define DR_LOCAL_SLOWDOWN (0x100)   /* Local slow the pipeline */
#define DR_GLOBAL_SLOWDOWN (0x200)  /* Global slow the pipeline */

#endif /* _ASM_X86_DEBUGREG_H */

cmd: